1. Technical Field
The present invention relates to computer bus architecture. More specifically, the present invention relates to Inter Integrated Circuit (I2C) buses.
2. Description of Related Art
Many similarities exist between seemingly unrelated designs in consumer, industrial and telecommunication electronics. Examples of similarities include intelligent control, general-purpose circuits (i.e. LCD drivers, I/O ports, RAM) and application-oriented circuits. The Philips Inter Integrated Circuit (I2C) bus is a bi-directional two-wire serial bus designed to exploit these similarities.
Devices on the I2C bus are accessed by individual addresses, 00-FF (even addresses for Writes, odd addresses for reads). The I2C architecture can be used for a variety of functions. One example is Vital Product Data (VPD). Each component in the system contains a small Electrically Erasable Programmable Read Only Memory (EEPROM) (typically 256 bytes) which contains the VPD information such as serial numbers, part numbers, and engineering change revision level.
I2C busses can connect a number of devices simultaneously to the same pair of bus wires. Normally, the device addresses on the I2C bus are predefined by hardwiring on the circuit boards. A limitation of the I2C bus is that it will only allow a single device to respond to each even address between 00 and FF. All addresses are even because only the high-order seven bits of the address byte are used for the address. Bit 0 is used to indicate whether the operation is to be a read or a write. Therefore, there are a limited number of addresses that can be assigned to a device.
Many I2C devices have their high-order four address bits predefined. The remaining three address bits are assigned with the use of strapping pins on the device. For example, most I2C accessible EEPROMs have three strapping pins which limit their addresses to the even addresses between A0–AF. This permits eight unique addresses for a given chip of that type. Thus, only eight of these devices may be connected to a single bus and still each have a unique address.
In addition to address conflicts, a problem results when one of the devices malfunctions and pulls a bus signal (clock or data) low. The bus will not operate, and it is very difficult to determine which of the numerous devices connected to the I2C bus is responsible. A similar problem occurs when one of the bus conductors becomes shorted to a low impedance source, such as, for example, ground.
Therefore, a need exists for an I2C device that includes bus switches and that may be addressed using a reprogrammable device address.